Subversion Repositories programming

/**
 * Copyright 2006, Ira W. Snyder (devel@irasnyder.com)
 * License: GNU General Public License v2 (or, at your option, any later
 * version)
 */

/**
 * Name: Ira Snyder
 * Class: CS365 - Computer Architecture
 * Project #1 - Part 1 (support)
 * Due: 2006-02-06
 */

/**
 * File: ALU1.v
 * Purpose: Implementation of a 1-bit ALU.
 */

module ALU1 (a, b, cin, op, cout, result);
    input a, b, cin;
    input[0:1] op; /* 00=AND, 01=OR, 10=ADD, 11=ADD A+~B */
    output cout, result;

    wire w_or, w_and, w_binv, w_add_out, w_sub_out;

    /* AND, OP=00 */
    OR_2  or1  (a, b, w_or);

    /* OR, OP=01 */
    AND_2 and1 (a, b, w_and);

    /* ADD, OP=10 */
    /* SUB, OP=11 */
    NOT_1 not1 (b, w_binv);
    Mux2 m_binv (b, w_binv, op[1], w_adder_b);

    OneBitAdder add (cin, a, w_adder_b, cout, w_add_out);

    /* MUX the output together */
    Mux4 resMux (w_and, w_or, w_add_out, w_add_out, op, result);

endmodule