Blame | Last modification | View Log | RSS feed
/* digital logic circuit */
/*
+-----+
A ----| |
| and |--not---+
B ----| | | +-----+
+-----+ +---| |
| and |--- Z
+-----+ +---| |
C ----| | | +-----+
| or |--not---+
D ----| |
+-----+
*/
bit(0).
bit(1).
and(0,0,0).
and(0,1,0).
and(1,0,0).
and(1,1,1).
or(0,0,0).
or(0,1,1).
or(1,0,1).
or(1,1,1).
inv(0,1).
inv(1,0).
circuit(A,B,C,D,Z) :- bit(A),bit(B),bit(C),bit(D),
and(A,B,X),
or(C,D,Y),
inv(X,XBAR),
inv(Y,YBAR),
and(XBAR,YBAR,Z).