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    ALU1 bit2 (a[2], b[2], bit3_cout, op, bit2_cout, result[2]);
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    ALU1 bit2 (a[2], b[2], bit3_cout, op, bit2_cout, result[2]);
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    ALU1 bit1 (a[1], b[1], bit2_cout, op, bit1_cout, result[1]);
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    ALU1 bit1 (a[1], b[1], bit2_cout, op, bit1_cout, result[1]);
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    ALU1 bit0 (a[0], b[0], bit1_cout, op, cout, result[0]);
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    ALU1 bit0 (a[0], b[0], bit1_cout, op, cout, result[0]);
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endmodule
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endmodule
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module test_ALU4;
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    reg[0:3] x;
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    reg[0:3] y;
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    reg[0:1] op;
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    reg cin;
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    wire[0:3] result;
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    wire cout;
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    initial begin
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        $monitor ("time=%0d a=%b b=%b op=%b cin=%b cout=%b result=%b",
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                $time, x, y, op, cin, cout, result);
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    end
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    initial begin
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           x='b0101; y='b1011; op='b00; cin=0;
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        #1 x='b0101; y='b1011; op='b01; cin=0;
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        #1 x='b0101; y='b1011; op='b10; cin=0;
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        #1 x='b1101; y='b0011; op='b00; cin=0;
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        #1 x='b1010; y='b0011; op='b01; cin=0;
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        #1 x='b0101; y='b0011; op='b10; cin=0;
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        #1 x='b1010; y='b1001; op='b10; cin=0;
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    end
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    ALU4 alu4 (x, y, cin, op, cout, result);
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endmodule
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